Volume 0 , Issue 1 , PP: 8-23, 2019 | Cite this article as | XML | PDF | Full Length Article
Lobna Osman 1
Motivated by the merits of low power dissipation, ultra small size, and high speed of many nanoelectronic devices, They have been demonstrated to ensure future progress. Single electron devices became one of the most important nanoelectronic devices due to their interesting electrical characteristics and behavior. Many research efforts moved to describe their electrical characteristics to use them with conventional electronic devices. This paper deals with modeling and simulation of such new electronic devices. This paper presents a model for the Single Electron Transistor (SET) and its application in simulating hybrid SET/MOS ADC and DAC converters. This model uses the orthodox theory of single-electron tunneling and determines the average current through the transistor. The proposed model is more flexible that is valid for large range of drain to source voltage, valid for single or multi gate SET and symmetric or asymmetric SET. Finally, using this model with MOSFET transistors to realize a multi-bit Analog-to-Digital Converters (ADC) and Digital-to-Analog Converters (DAC). The hybrid n-bit DAC nano-circuits are simulated for (n=4 and 8) using Orcad Capture PSPICE. The performance of the SET/MOS hybrid n-bit ADC circuits were simulated (for n=3 and 8). The results show that the transient operation of hybrid SET/MOS circuit-based DAC could successfully operate at 1000K while ADC could operate at 144K. This performance can be compared with the pure SET circuits, the proposed converter circuits have been enhanced in the drive capability and the power dissipation. Compared with the oth`er SET/MOS hybrid circuit, the implemented converter circuits have low simulation time, high speed, high load drivability and low power dissipation.
Single-Electron Transistor (SET), MOS transistor , Nano-circuits, hybrid , simulation, orthodox theory, PSPICE , Master Equation, Tunnel Junction (TJ), Coulomb blockade
[1] Y. Taur, D. A. Buchanan, W. Chen, D. Frank. K. Ismail, S. Lo, G. Sai- Ha1asz, R. Viswanathan, H. Wann, S. Wind, and H. Wong.: ‘CMOS Scaling into the Nanometer Regime’, Proceeding of the IEEE, Vol. 85(No.4):pp.486-¬504, 1997.
[2] K.K. Likharev: ‘Single-electron devices and their applications’, Proc. IEEE , 87, pp. 606–632, 1999.
[3] C. J. Gorter: ‘A possible explanation of the increase of the electrical resistance of thin metal films at low temperatures and small field strengths’, Physica, vol. 17, no. 8, pp. 777–780, Aug. 1951.
[4] S. J. Ahn and D. M. Kim: ‘Asynchronous analogue-to-digital converter for single-electron circuits’, Electron. Lett., vol. 34, pp. 172–173, 1998.
[5] Y. Mizugaki and P. Delsing: ‘Single-electron signal modulator designed for a flash analog-to-digital converter’, Jpn. J. Appl. Phys., vol. 40, pp. 6157–6162, 2001.
[6] C. H. Hu, J. F. Jiang, and Q. Y. Cai: ‘A single-electron-transistor-based analog/digital converter’, in Proc. IEEE-NANO, 2002, pp. 487–490.
[7] C. Lageweg, S. Cotofana, and S. Vassiliadis: ‘Digital to analog conversion performed in single electron technology’, in Proc. IEEE-NANO, 2001, pp. 105–110.
[8] J. Y. Le, J. F. Jiang, and Q. Y. Cai: ‘Design of hybrid SET-CMOS D/A converter’, Proc. IEEE, vol. 89, no. , pp. 299–302, 2001.
[9] C. Hu, S. D. Cotofana, and J. Jiang: ‘Analog-to-digital converter based on single-electron tunneling transistor’, IEEE Trans. VLSI Syst., vol. 12, no. 11, pp. 1209–1213, Nov. 2004.
[10] C. Wasshuber, H. Kosina, and S. Selberherr, “SIMON—A Simulator for Single-Electron Tunnel Devices and Circuits”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 16, no. 9, pp. 937-944, 1997.
[11] G. Lientshnig, I. Weymann, and P. Hadley: ‘Simulating hybrid circuits of single-electron transistors and field effect transistors’, Jpn. J. Appl. Phys., Vol. 42, Part 1, No.10, pp. 6467-6472, 2003.
[12] M.Y.A. Ismail, "Analysis and Modeling of a Single Electron Transistor", M.Sc. Thesis, 2006, Arab Academy for Science and Technology.
[13] Hasaneen EAM, Wahab MAA, Ahmed MG. Exact analytical model of single electron transistor for practical IC design. Microelectron Reliab 2011;51(4):733–45.
[14] Amit Jain, Basanta Singh Nameriakpam , Subir Kumar Sarkar, " A new compact analytical model of single electron transistor for hybrid SET–MOS circuits", Solid-State Electronics 104 (2015) 90–95.
[15] S. Mahapatra, V. Vaish, C. Wasshuber, K. Banerjee, and A. M. Ionescu, "Analytical Modeling of Single Electron Transistor for Hybrid CMOS-SET Analog IC Design", IEEE Trans. Elect. Dev., VOL. 42, NO. 11, pp. 1772-1782, 2004.
[16] Qin Li, Li Cai, and Gang Wu: ‘Digital-Analog and Analog-Digital Converters Based on single-electron and MOS transistors’, 2010, 8th IEEE International Conference on Control and Automation Xiamen, China, June 9-11, 2010.
[17] C. H. Hu, S. D. Cotofana and J.F. Jiang: ‘Digital to Analogue converter based on single-electron tunneling transistor’, IEE Proc.-Circuits Devices Syst., 2004, 10, Vol. 151(5): 438-442. 2004,10.
[18] C. Lageweg, S. Cotofana, and S. Vassiliadis: ‘Digital to analog conversion performed in single electron technology’, in Proc. IEEE-NANO, 2001, pp. 105–110.
[19] C. Hu, S. D. Cotofana, and J. Jiang: ‘Analog-to-digital converter based on single-electron tunneling transistor’, IEEE Trans. VLSI Syst., vol. 12, no. 11, pp. 1209–1213, Nov. 2004.
[20] M-J Chun and Y-h Jeong: ‘SET/CMOS universal literal gate-based Analog-to-Digital converter’, the 3rd IEEE Conference on Nanotechnology, 12-14 Aug. 2003, Vol.2, pp.745- 748.
[21] C. H. Hu, J. F. Jiang, and Q. Y. Cai: ‘A single-electron-transistor-based analog/digital converter’, in Proc. IEEE-NANO, 2002, pp. 487–490.
[22] C. Hu, S. D. Cotofana, and J. Jiang: ‘Analog-to-digital converter based on single-electron tunneling transistor’, IEEE Trans. VLSI Syst., vol. 12, no. 11, pp. 1209–1213, Nov. 2004.
[23] S-W Jung, B-H Lee, and Y-H Jeong: ‘Digital quantizer based on single electron box for multi-valued logic circuits’, Proceedings of 2005 5th IEEE Conference on Nanotechnology, Nagoya, Japan, July 2005: 156-159.
[24] Choong Hyun Lee, Se Woon Kim, Jang Uk Lee, Seung Hwan Seo, Gu-Cheol Kang, Kang Sup Roh, Kwan Young Kim, Soon Young Lee, Dong Myong Kim, Member, IEEE, and Dae Hwan Kim: ‘Design of a Robust Analog-to-Digital Converter Based on Complementary SET/CMOS Hybrid Amplifier’, IEEE Transactions on nanotechnology, Vol. 6, No. 6, November 2007.
[25] Clemens Maria Hammerschied: ‘CMOS A/D converters using MOSFET only R-2R ladder Dissertation’, Swiss federal institute of Technology, (2000).