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International Journal of Wireless and Ad Hoc Communication
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Title

A PSPICE Fast Model for the Single Electron Transistor

  Lobna Osman 1

1  Delta Higher Institute for Engineering & Technology, Department of Electronics and Communications Engineering, Egypt
    (englobna20@yahoo.com)


Doi   :   https://doi.org/10.54216/IJWAC.000101


Abstract :

Motivated by the merits of low power dissipation, ultra small size, and high speed of many nanoelectronic devices, They have been demonstrated to ensure future progress. Single electron devices became one of the most important nanoelectronic devices due to their interesting electrical characteristics and behavior. Many research efforts moved to describe their electrical characteristics to use them with conventional electronic devices. This paper deals with modeling and simulation of such new electronic devices. This paper presents a model for the Single Electron Transistor (SET) and its application in simulating hybrid SET/MOS ADC and DAC converters. This model uses the orthodox theory of single-electron tunneling and determines the average current through the transistor. The proposed model is more flexible that is valid for large range of drain to source voltage, valid for single or multi gate SET and symmetric or asymmetric SET. Finally, using this model with MOSFET transistors to realize a multi-bit Analog-to-Digital Converters (ADC) and Digital-to-Analog Converters (DAC). The hybrid n-bit DAC nano-circuits are simulated for (n=4 and 8) using Orcad Capture PSPICE. The performance of the SET/MOS hybrid n-bit ADC circuits were simulated (for n=3 and 8). The results show that the transient operation of hybrid SET/MOS circuit-based DAC could successfully operate at 1000K while ADC could operate at 144K. This performance can be compared with the pure SET circuits, the proposed converter circuits have been enhanced in the drive capability and the power dissipation. Compared with the oth`er SET/MOS hybrid circuit, the implemented converter circuits have low simulation time, high speed, high load drivability and low power dissipation.

Keywords :

Single-Electron Transistor (SET) , MOS transistor; Nano-circuits , hybrid; simulation , orthodox theory , PSPICE; Master Equation , Tunnel Junction (TJ) , Coulomb blockade

References :

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Cite this Article as :
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MLA Lobna Osman. "A PSPICE Fast Model for the Single Electron Transistor." International Journal of Wireless and Ad Hoc Communication, Vol. 0, No. 1, 2019 ,PP. 8-23 (Doi   :  https://doi.org/10.54216/IJWAC.000101)
APA Lobna Osman. (2019). A PSPICE Fast Model for the Single Electron Transistor. Journal of International Journal of Wireless and Ad Hoc Communication, 0 ( 1 ), 8-23 (Doi   :  https://doi.org/10.54216/IJWAC.000101)
Chicago Lobna Osman. "A PSPICE Fast Model for the Single Electron Transistor." Journal of International Journal of Wireless and Ad Hoc Communication, 0 no. 1 (2019): 8-23 (Doi   :  https://doi.org/10.54216/IJWAC.000101)
Harvard Lobna Osman. (2019). A PSPICE Fast Model for the Single Electron Transistor. Journal of International Journal of Wireless and Ad Hoc Communication, 0 ( 1 ), 8-23 (Doi   :  https://doi.org/10.54216/IJWAC.000101)
Vancouver Lobna Osman. A PSPICE Fast Model for the Single Electron Transistor. Journal of International Journal of Wireless and Ad Hoc Communication, (2019); 0 ( 1 ): 8-23 (Doi   :  https://doi.org/10.54216/IJWAC.000101)
IEEE Lobna Osman, A PSPICE Fast Model for the Single Electron Transistor, Journal of International Journal of Wireless and Ad Hoc Communication, Vol. 0 , No. 1 , (2019) : 8-23 (Doi   :  https://doi.org/10.54216/IJWAC.000101)