A Novel approach for Minimizing the Process Voltage Temperature Variation (PVT) Detector for Digital Converter Design

aspg-20-4210-1791307686 20261006172806 American Scientific Publishing Group admin@americaspg.com American Scientific Publishing Group International Journal of Wireless and Ad Hoc Communication IJWAC 2692-4056 2025 9 2 A Novel approach for Minimizing the Process Voltage Temperature Variation (PVT) Detector for Digital Converter Design R. Shanmuga Sundaram Assistant Professor Department of ECE, Knowledge Institute of Technology, Salem, Tamil Nadu, India R. Mohanraj PG Scholar, Department of ECE, Knowledge Institute of Technology, Salem, Tamil Nadu, India S. Sasidevi Assistant Professor Department of ECE, Knowledge Institute of Technology, Salem, Tamil Nadu, India Time-to-digital converters (TDCs) are vital components in digital circuitry, crucial for synchronization and precise measurement, demanding high resolution and accuracy. This brief introduces a novel TDC designed in order to reduce the impact of fluctuations in process, voltage, and temperature. A process voltage temperature detector using an extra delay line that is optimized for locking situations is incorporated into the suggested TDC to distinguish PVT corners effectively. Implemented in a 90-nm process, on-silicon measurements reveal impressive performance achieving 30-ps resolution. 2025 25 32 4210 https://creativecommons.org/licenses/by/4.0/ 10.54216/IJWAC.090205 https://americaspg.com/journal/20/article/4210 https://americaspg.com/storage/articles/manuscripts/01KW5F37EX2N6MYHFWPRRCVPD9.pdf