Novel Slumped SRAM Configuration using QCA Leveraging Differential Voltage Sensing for Enhanced Stability and Efficiency
N. Naga Saranya 1,*, V. Jean Shilpa2, K. Jayakumar3, P .Senthil 4, M. Arun5
1Associate Professor, Department of Computer Applications, Saveetha College of Liberal Arts & Science, SIMATS, Chennai, India
2 Associate Professor, Department of ECE, B S ABDUR RAHMAN CRESCENT INSTITUTE OF SCIENCE AND TECHNOLOGY , Chennai, India
3Professor in EEE, J.J. College of Engineering and Technology, Trichy, India.
4Assistant Professor , Department of Information Technology, S.A. Engineering College, India.
5Assistant Professor, ECE, Panimalar Engineering College, Chennai, India.
Emails: drnagasaranya@gmail.com; jeanshilpa@crescent.education; rkjkumar70@gmail.com; senthilp@saec.ac.in; arunmemba@ieee.org
Abstract
This paper presents a novel Slumped Static Random-Access Memory (SRAM) configuration utilizing Quantum-dot Cellular Automata (QCA) technology, aimed at achieving enhanced stability and efficiency. Traditional CMOS-based SRAM designs face significant challenges related to power consumption and scalability as technology nodes shrink. QCA, with its potential for ultra-low power dissipation and high-density integration, emerges as a promising alternative. Our proposed SRAM configuration leverages a unique differential voltage sensing mechanism to bolster the stability of the memory cells, particularly under conditions of variability and noise. Through detailed simulations and comparative analysis, we demonstrate that the Slumped SRAM configuration not only improves static noise margin (SNM) but also reduces power consumption and enhances overall read/write speed. The results indicate a substantial improvement in stability and operational efficiency, positioning this design as a viable solution for future high-performance, low-power memory applications. Through detailed simulations and comparative analysis, we demonstrate that the Slumped SRAM configuration achieves a static noise margin (SNM) improvement of 35% over conventional CMOS-based SRAM designs. Additionally, the proposed design reduces power consumption by 40% and enhances read/write speed by 25%. These results indicate a substantial improvement in stability and operational efficiency, positioning this design as a viable solution for future high-performance, low-power memory applications.
Keywords: Quantum-dot Cellular Automata (QCA); Static Random-Access Memory (SRAM); Differential Voltage Sensing; Static Noise Margin (SNM); Low Power Consumption; High-Density Integration.